The imaging processes used in current commercial microelectronic production are based almost entirely on optical lithography. Current lithographic techniques are based on a “top-down” approach, wherein patterns are imaged onto a resist using a mask to form shapes that are transferred into the substrate by further processing. However it is becoming increasingly difficult and expensive to extend this approach to create patterns with dimensions on the nanometer scale. Accordingly, there exists a need for a practical and economical approach to create patterns with dimensions on the nanometer scale.